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Digital-electronics Questions Set 120:

Quiz Mode

What is the Gray code equivalent of (13)₁₀?

1011

0011

0001

0011

Solution:

The number of flip-flops required to implement a mod-45 counter is

Solution:

What is the simplified form of (AB+CD)[(A'+B')(C'+D')]?

AB(C+D')

(A+B)(C'+D)

Solution:

Determine the fan-out for a gate with _IOL(MAX) = 20mA and I_IL(MAX) = 0.0020A.

Solution:

The minimum number of flip-flops required to design a Moore type sequence detector to detect the sequence 1001 is :

Solution:

Determine the sum (∑) and the output carry (Cout) of a half-adder for the input bits 0 and 1.

∑=1, Cout=0

∑=1, Cout=1

∑=0, Cout=0

∑=0, Cout=1

Solution:

Which of the following circuits is not used in an array-structured memory architecture?

Sense amplifiers

Row decoder

Column decoder

Row and column encoder

Solution:

In a dual slope integrating digital voltmeter, first integration is carried for 20 periods of f = 50 hz. If Vr = 4 V, what will be the total conversion time for input 2 V

1) 0.2

2) 0.3

3) 0.5

4) 0.8

Solution:

What does the triangle and the circle represent in the given flip flop diagram?

Positive edge triggering

Negative edge triggering

Level triggering

All the above

Solution:

The K-map based Boolean reduction is based on the following Unifying Theorem: A + A’ = 1.

Impact

Non-Impact

Force

Complementarity

Digital-electronics Questions Set 120:

What is the Gray code equivalent of (13)₁₀?

Solution:

The number of flip-flops required to implement a mod-45 counter is

Solution:

What is the simplified form of (AB+CD)[(A'+B')(C'+D')]?

Solution:

Determine the fan-out for a gate with _IOL(MAX) = 20mA and I_IL(MAX) = 0.0020A.

Solution:

The minimum number of flip-flops required to design a Moore type sequence detector to detect the sequence 1001 is :

Solution:

Determine the sum (∑) and the output carry (Cout) of a half-adder for the input bits 0 and 1.

Solution:

Which of the following circuits is not used in an array-structured memory architecture?

Solution:

In a dual slope integrating digital voltmeter, first integration is carried for 20 periods of f = 50 hz. If Vr = 4 V, what will be the total conversion time for input 2 V

Solution:

What does the triangle and the circle represent in the given flip flop diagram?

Solution:

The K-map based Boolean reduction is based on the following Unifying Theorem: A + A’ = 1.

Solution:

Related Question Sets:

Related Topics:

Digital-electronics Questions Set 120:

What is the Gray code equivalent of (13)10?

Solution:

The number of flip-flops required to implement a mod-45 counter is

Solution:

What is the simplified form of (AB+CD)[(A'+B')(C'+D')]?

Solution:

Determine the fan-out for a gate with IOL(MAX) = 20mA and IIL(MAX) = 0.0020A.

Solution:

The minimum number of flip-flops required to design a Moore type sequence detector to detect the sequence 1001 is :

Solution:

Determine the sum (∑) and the output carry (Cout) of a half-adder for the input bits 0 and 1.

Solution:

Which of the following circuits is not used in an array-structured memory architecture?

Solution:

In a dual slope integrating digital voltmeter, first integration is carried for 20 periods of f = 50 hz. If Vr = 4 V, what will be the total conversion time for input 2 V

Solution:

What does the triangle and the circle represent in the given flip flop diagram?

Solution:

The K-map based Boolean reduction is based on the following Unifying Theorem: A + A’ = 1.

Solution:

Related Question Sets:

Related Topics:

What is the Gray code equivalent of (13)₁₀?

Determine the fan-out for a gate with _IOL(MAX) = 20mA and I_IL(MAX) = 0.0020A.