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Digital-electronics Questions Set 131:

Quiz Mode

What is the 2's complement of the binary number 0101?

1011

1111

1101

1110

Solution:

How many flip-flops are required to make a mod-10 binary counter?

Solution:

In an FPGA, vertical and horizontal directions are separated by which component?

Channel

Line

Flipflop

Strobe

Solution:

What are ripple counters also called?

Asynchronous counters

Ring counter

Johnson counter

Synchronous counters

Solution:

For a 4-bit DAC, the least significant bit (LSB) is ____.

6.25% of full scale

12% of full scale

1.2% of full scale

0.625% of full scale

Solution:

Assume that a 4-bit serial in/serial out shift register is initially cleared. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse?

1100

0011

0000

1111

Solution:

How many different states does a 3-bit asynchronous down counter have?

2

4

6

8

Solution:

In D flip-flop, if clock input is LOW, the D input __________

goes low

goes high

goes in memory state

none of the above

Solution:

Fundamental mode is another name for ____________

Edge operation

Level operation

Pulse operation

Clock operation

Solution:

What would happen if smaller logic modules are utilized for performing logical functions associated with FPGAs?

Propagation delay will increase and FPGA area will increase

Wastage of logic modules will not be prevented and the number of interconnected paths in the device will decrease

Propagation delay will increase and the number of interconnected paths in the device will decrease

FPGA area will increase and wastage of logic modules will not be prevented

Digital-electronics Questions Set 131:

What is the 2's complement of the binary number 0101?

Solution:

How many flip-flops are required to make a mod-10 binary counter?

Solution:

In an FPGA, vertical and horizontal directions are separated by which component?

Solution:

What are ripple counters also called?

Solution:

For a 4-bit DAC, the least significant bit (LSB) is ____.

Solution:

Assume that a 4-bit serial in/serial out shift register is initially cleared. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse?

Solution:

How many different states does a 3-bit asynchronous down counter have?

Solution:

In D flip-flop, if clock input is LOW, the D input __________

Solution:

Fundamental mode is another name for ____________

Solution:

What would happen if smaller logic modules are utilized for performing logical functions associated with FPGAs?

Solution:

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