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Digital-electronics Questions Set 26:

Quiz Mode

If the inputs of a subtractor are A and B, what is the output when A = B?

Solution:

Which of the following is not a Read-Write memory?

LIFO

Shift registers

DRAM

PROM

Solution:

The maximum range of an n-bit counter is

0 - 2^(n-1)

0 - 2^(n+1)

0 - 2^n

0 - (2^n -1)

Solution:

The states of Q and Q' after the clock pulse are if J = Q XOR Q' and K = Q NOR Q'.

1, 1

1, 0

0, 1

Cannot be determined without initial states

Solution:

What are the advantages of CMOS inverter clock generators?

All of the above

Good stability

Operation over a wide range of voltage and frequency

Low power consumption

Solution:

In a circuit with a 50% duty cycle clock, when does the latch store data?

Don't care (x)

When the clock is high (1)

When the clock is low (0)

When the clock is in high impedance (z)

Solution:

In a CMOS inverter, if the time delay from high to low (t_PHL) is 2 ns and the time delay from low to high (t_PLH) is 4 ns, what is the propagation delay of the CMOS inverter?

2 ns

3 ns

4 ns

5 ns

Solution:

Circuit A is a 1-bit adder, and circuit B is a 1-bit multiplier.

Circuit A has more gates than circuit B

Circuit B has more gates than circuit A

Circuit A has the same number of gates as circuit B

None of the above

Solution:

To convert an SR flip-flop to a JK flip-flop, which of the following connections must be made? Qn represents the present state.

S = J Qn' R= Qn K

S = J + Qn R= Qn K

S = J + Qn R= Qn +K

S = J Qn' R= Qn + K

Solution:

Which of the following is an important feature of the sum-of-products form of Boolean expressions?

The delay times are greatly reduced over other forms

No signal must pass through more than two gates, not including inverters

All logic circuits are reduced to nothing more than simple AND and OR operations

The maximum number of gates that any signal must pass through is reduced by a factor of two

Solution:

Related Topics:

Microcontrollers Questions Set 1

Electromagnetic-theory Questions Set 1

Microprocessor Questions Set 1

System-verilog Questions Set 1

Control-systems Questions Set 1

Signals-and-systems Questions Set 1

Vhdl Questions Set 1

Analog-designs Questions Set 1

Matlab Questions Set 1

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Digital-electronics Questions Set 26:

If the inputs of a subtractor are A and B, what is the output when A = B?

Solution:

Which of the following is not a Read-Write memory?

Solution:

The maximum range of an n-bit counter is

Solution:

The states of Q and Q' after the clock pulse are if J = Q XOR Q' and K = Q NOR Q'.

Solution:

What are the advantages of CMOS inverter clock generators?

Solution:

In a circuit with a 50% duty cycle clock, when does the latch store data?

Solution:

In a CMOS inverter, if the time delay from high to low (tPHL) is 2 ns and the time delay from low to high (tPLH) is 4 ns, what is the propagation delay of the CMOS inverter?

Solution:

Circuit A is a 1-bit adder, and circuit B is a 1-bit multiplier.

Solution:

To convert an SR flip-flop to a JK flip-flop, which of the following connections must be made? Qn represents the present state.

Solution:

Which of the following is an important feature of the sum-of-products form of Boolean expressions?

Solution:

Related Question Sets:

Related Topics:

In a CMOS inverter, if the time delay from high to low (t_PHL) is 2 ns and the time delay from low to high (t_PLH) is 4 ns, what is the propagation delay of the CMOS inverter?