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Digital-electronics Questions Set 48:

Quiz Mode

Octal Equivalent of (10111101)₂ is .

575

375

275

475

Solution:

The most suitable logic gate for comparing two bits is

AND

NAND

XOR

Solution:

Convert the decimal number 41.3 to binary.

0011_1101.110

101001.010

0011_1101.010

0010_1001.010

Solution:

How many MOSFETs (including both PMOS and NMOS) are required in the digital CMOS design of a NAND gate?

Solution:

Which of the following logic families are classified as Saturated Bipolar Logic Families?

1 and 2

3 and 4

1, 2 and 3

1, 3 and 4

Solution:

If the three inputs of a subtractor are A, B, and C, what is the output?

A AND B AND C

A NAND B NAND C

A XOR B XOR C

A XNOR B XNOR C

Solution:

In a D flip-flop, if the output toggles for the positive edge of the clock cycle at a frequency 'f', then the output frequency is _______.

f/2

√f

Solution:

In the circuit shown below the propagation delay of each gate is 100psec. What is the frequency of the generated wave?

100 MHz

10 GHz

10MHz

1GHz

Solution:

Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first)

1100

0011

0000

1111

Solution:

A basic S-R flip-flop can be constructed by cross-coupling of which basic logic gates?

NOR or NAND gates

AND or OR gates

XOR or XNOR gates

AND or NOR gates

Digital-electronics Questions Set 48:

Octal Equivalent of (10111101)₂ is .

Solution:

The most suitable logic gate for comparing two bits is

Solution:

Convert the decimal number 41.3 to binary.

Solution:

How many MOSFETs (including both PMOS and NMOS) are required in the digital CMOS design of a NAND gate?

Solution:

Which of the following logic families are classified as Saturated Bipolar Logic Families?

Solution:

If the three inputs of a subtractor are A, B, and C, what is the output?

Solution:

In a D flip-flop, if the output toggles for the positive edge of the clock cycle at a frequency 'f', then the output frequency is _______.

Solution:

In the circuit shown below the propagation delay of each gate is 100psec. What is the frequency of the generated wave?

Solution:

Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first)

Solution:

A basic S-R flip-flop can be constructed by cross-coupling of which basic logic gates?

Solution:

Related Question Sets:

Related Topics:

Digital-electronics Questions Set 48:

Octal Equivalent of (10111101)2 is .

Solution:

The most suitable logic gate for comparing two bits is

Solution:

Convert the decimal number 41.3 to binary.

Solution:

How many MOSFETs (including both PMOS and NMOS) are required in the digital CMOS design of a NAND gate?

Solution:

Which of the following logic families are classified as Saturated Bipolar Logic Families?

Solution:

If the three inputs of a subtractor are A, B, and C, what is the output?

Solution:

In a D flip-flop, if the output toggles for the positive edge of the clock cycle at a frequency 'f', then the output frequency is _______.

Solution:

In the circuit shown below the propagation delay of each gate is 100psec. What is the frequency of the generated wave?

Solution:

Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first)

Solution:

A basic S-R flip-flop can be constructed by cross-coupling of which basic logic gates?

Solution:

Related Question Sets:

Related Topics:

Octal Equivalent of (10111101)₂ is .