Digital-electronics Questions Set 146:
Logic circuits can also be designed using
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How is a J-K flip-flop made to toggle?
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To avoid loading during read operation, the device used is
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The Boolean expression Y = (A AND B)' is logically equivalent to what single gate?
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What is the complement of [(AB'+C')D+E' ]F?
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The duty cycle of the most significant bit (MSB) from a 4-bit (0–9) Binary-Coded Decimal (BCD) counter is:
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Which of the following statements correctly describes De Morgan's Theorems?
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Minimize the Boolean Expression f = ΠM(1,3,4,5,10,11,12,14)
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A 4-bit synchronous counter with a series carry uses flip-flops and AND gates, with a propagation delay of 30 ns for the flip-flops and 10 ns for the AND gates. The maximum time interval required between 2 successive clock pulses for reliable operation of the counter is:
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DOWN counter is ____________
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