Which among the following has a Programmable array of AND gates and a Fixed array of OR gates?

A memory chip of size 4KB has a 10-bit address bus. Find the data bus size.

If a counter with 10 flip-flops is initially at 0, what count will it hold after 2060 pulses?

In an SR latch made by cross coupling two NAND gates, if S=R=0, then the output will be in what state?

Convert the given boolean function to its minterm canonical representation:

F(x,y,z) = x.(y+z') + z

The output of a logic gate is 1 when all its inputs are at logic 0. The gate is either

To obtain a 16-bit data bus width, how should the two 4K×8 RAM and ROM chips be arranged?

Which of the following statements is correct about SRAM (Static Random Access Memory)?

Which of the following gates are complementary to each other ?

Which statement best describes a Karnaugh map?