Overview
Principal Engineer for NPU compiler and architecture, focused on hardware-software co-design for next-generation AI inference accelerators.
What you'll do
- Develop compiler and software proof-of-concepts for current and next-generation NPU architectures.
- Define software abstractions and compiler flows to expose NPU capabilities to AI workloads.
- Develop and evaluate compiler concepts like graph lowering, IRs, operator mapping, scheduling, tiling, fusion, memory planning, and code generation.
- Create executable software models to demonstrate architectural feasibility with representative AI workloads.
- Build lightweight compiler/runtime infrastructure to validate new hardware features before production implementation.
- Analyze hardware-software exposure across compute architecture, memory hierarchy, data movement, dataflow, and instruction set.
- Build software performance models and experiments to quantify the impact of proposed hardware features.
What you'll need
- 8+ years of experience in compiler development, systems software, computer architecture, AI accelerators, or a related area.
- Bachelor’s or Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field.
- Strong C++ skills and proficiency in Python.
- Strong understanding of compiler architecture and compiler optimization techniques.
- Strong understanding of computer architecture, including accelerator architectures, memory hierarchies, and data movement.
- Experience analyzing AI/ML workloads and performance bottlenecks.
- Ability to work across hardware and software boundaries and communicate with hardware architects.
Details
Read the full description and apply on the company’s own careers page.
