A process stack does not contain

For real-time operating systems, interrupt latency should be _____.

Semaphores are mostly used to implement _____ mechanisms

What are the two main types of real-time streaming?

The offset of the logical address must be _____.

Division by zero, accessing a protected or non-existent memory address, or attempting to execute a privileged instruction from user mode are all categorized as ________

What are the necessary conditions for a deadlock to occur?

What is a breach of confidentiality?

Consider a two-level cache hierarchy L1 and L2 caches. An application incurs 1.4 memory accesses per instruction on average. For this application, the miss rate of L1 cache 0.1, the L2 cache experience on average. 7 misses per 1000 instructions. The miss rate of L2 expressed correct to two decimal places is

Consider a non-pipelined processor with a clock rate of 2.5 gigahertz and average cycles per instruction of four. The same processor is upgraded to a pipelined processor with five stages; but due to the internal pipeline delay, the clock speed is reduced to 2 gigahertz. Assume that there are no stalls in the pipeline. The speed up achieved in this pipelined processor is