Advanced Package Architect Sr. Staff Engineer

Overview

Marvell's Central Engineering team is seeking a High-speed IC package development engineer to develop advanced microelectronic packages from concept through tapeout, working with package architects and technical leads.

What you'll do

• Drive microelectronic package development from concept through tapeout, selecting appropriate technologies with package architects and technical leads.
• Ensure manufacturability, performance, reliability, and cost compliance of packages.
• Develop C4 and BGA ball maps optimized for SI/PI and layout efficiency.
• Plan and validate netlist mappings across dies, interposers, and substrates.
• Define die placement, padstacks, net assignments, and package-level connectivity.
• Create and maintain Package Requirement Documents (PRDs) detailing die arrangements, stackups, and design constraints.

What you'll need

• 8+ years of related professional experience.
• Previous experience developing netlists and schematics for large, complex packages.
• Previous experience developing C4 and BGA ball maps for high-pin-count designs.
• Proficiency with design tools Cadence OrbitIO / Integrity System Planner (ISP) or equivalent.
• Strong foundational understanding of package design, including design rules, breakout, place and route, signal shielding, reference planes, power distribution, and pinout optimization across package and system requirements.
• Solid grasp of SI/PI fundamentals at the substrate, board, and system levels.
• Knowledge of 2D, 2.5D, and emerging packaging architectures such as CoWoS-S/R/L, EMIB, CPO, and CPC.
• High-level understanding of thermal and mechanical package constraints (e.g., warpage, TIM).
• Experience contributing to tool, process, and flow development, including library maintenance and basic scripting for automation.
• Familiarity with foundry design rules and substrate manufacturing constraints.
• Demonstrated ability to work across cross-functional teams and global time zones; strong interpersonal skills and willingness to learn.
• Experience collaborating with chip and board design and electrical simulation teams to optimize package and system co-design.
• Strong communication, presentation, and documentation skills.

Nice to have

• Familiarity with running and interpreting signal and power simulations.

Details

• Location: Bangalore.
• Eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers.
• Applicants must be eligible to access export-controlled information under applicable law; may be subject to an export license review process unless a U.S. citizen, lawful permanent resident, or protected individual.