Experienced ASIC-FPGA Verification Engineer

Overview

Boeing India Engineering seeks an Experienced ASIC-FPGA Verification Engineer with considerable experience in design to support multiple product lines in commercial and defense electronics development.

What you'll do

• Use high-level architectural documentation along with algorithm description and implement functions for test bench architecture and test plan using UVM for IP, Subsystem and System level.
• Develop reusable testbench components like scoreboards, checkers, reference models along with UVC using SV and UVM.
• Own quality of deliverables for verification across multiple milestones at FPGA/ASIC life cycle.
• Architect Reusable Verification components, which can be used across FPGA/ASIC life cycle.
• Identify, track and status technical performance measures to measure progress and ensure compliance with verification requirements.
• Lead AI initiatives for Verification Automation and Verification Reviews.

What you'll need

• Bachelor's degree in engineering, Engineering Technology (including Manufacturing Technology), Computer Science, Data Science, Mathematics, Physics, Chemistry, or non-US equivalent qualifications directly related to the work statement.
• 9+ years of experience in Digital Functional verification for both ASIC and FPGA at IP, Subsystem and System level.
• 9+ years of experience in leading and owning verification Activities for Multiple ASIC and FPGA product Tape outs.
• 5+ years of Hands-on domain experience on PCIe Gen5/Gen6/Gen4 (Phy, link and transaction layers) and Ethernet (Mac Layer).
• 5+ years of experience in doing UVM based Testbench Architecture for PCIe and Ethernet across IP/Subsystem and system level for multiple projects in ASIC and FPGA.
• 9+ years Hands-on Experience for PCIe Gen4/Gen5/Gen6 and Ethernet protocols.

Nice to have

• Experience in IP, Subsystem and system along with Verification Architecture for ASIC and FPGA Products.
• Experience identifying, tracking, and providing status of technical performance metrics to measure progress and ensure compliance with requirements.
• Expert in using object-oriented programming in System Verilog along with UVM methodology.
• Expert in using Universal Verification Methodology (UVM): Experience crafting drivers, monitors, predictors, coverage model and scoreboards and UVCs.
• Work experience crafting a self-checking scoreboard and Reference models from scratch for SoCs/ASIC/FPGA.
• Expertise in verification working with internal/external VIPs, its development and evaluation with multiple vendors.
• Expert in crafting SVA Assertions for dynamic simulation and formal verification.
• Expert in coverage (code and functional) signoff, by reviewing complex ASIC and FPGA RTL code.
• Work experience using Linux or Unix terminal commands.
• Experience using scripting languages: Make, Perl, Python, shell scripts, etc.
• Experience using Revision Control Systems: Subversion (SVN), CVS, Git.
• Experience in Power aware simulation debug along Gate level simulation debug.
• Experience in Avionics protocols.
• Experience in DO-254 for ASIC/FPGA.

Details

• Location: Bangalore, India.
• Relocation is offered within India based on candidate eligibility.
• No security clearance required.
• Employer will not sponsor applicants for employment visa status.
• Not contingent upon program award.
• Not a shift worker (India).
• Typical education/experience: Bachelor's degree and typically 9 years of related work experience, or an equivalent combination of education and experience.