GPU Logic Design Engineer

Overview

Develop and refine the graphics IPs that drive Intel's GPUs, designing and verifying RTL logic for GPU IP blocks within the AI SOC SCAN ATPG organization of the Data Center Group.

What you'll do

• Develop logic design and write RTL code for GPU IP blocks, focusing on graphics, compute, display, and media.
• Collaborate in defining the architecture and microarchitecture features of GPU blocks.
• Optimize logic designs to meet power, performance, area, and timing goals for physical implementation.
• Review verification plans and drive unit-level verification to ensure correctness of design features.
• Resolve RTL test failures and implement corrective measures to guarantee feature integrity.
• Support SoC customers in integrating and verifying GPU blocks for high-quality SoC designs.

What you'll need

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field, with 3+ years of industry experience; OR Master's degree in the same fields, with 2+ years of industry experience; OR PhD with no industry experience.
• Hands-on experience with at least one key DFT feature, such as TAP/JTAG, Scan/ATPG, or Array DFT (MBIST/PBIST).
• Proficiency in using EDA tools such as ATPG tools, Mentor Tessent shell, and VCS simulation/debug tools.
• Background in silicon enabling, debug, or test pattern development.

Nice to have

• Proficiency in programming or scripting languages for design automation.
• Familiarity with structural design flows, including timing analysis, routing, placement, or clocking.
• Knowledge of high-volume manufacturing requirements and test flows.
• Understanding of 3D, media, and display graphics pipelines.
• SoC architecture expertise.

Details

• Location: India, Bangalore.
• Work model: hybrid, splitting time between the assigned Intel site and off-site.
• Job type: Experienced Hire.
• Shift: Shift 1 (India).