Principal Design Engineer

Overview

Principal Design Engineer focused on IR-drop and EM/PDN signoff and fixing issues during PnR and PV cycles using EDA tools and automation.

What you'll do

• Perform static and dynamic IR-drop and EM analysis using RedHawk-SC and Voltus.
• Drive IR/EM fixes during PnR and PV signoff cycles.
• Optimize full-chip and block-level Power Delivery Network (PDN), including PG mesh and RDL structures.
• Develop automation scripts using TCL/Python/Perl/Shell to improve signoff efficiency and reduce TAT.
• Collaborate with cross-functional teams to resolve IR hot spots, EM-violating nets, and PG bottlenecks.

What you'll need

• Experience range of 7–15 years.
• 7+ years in IR/EM/PDN signoff across 7nm to 3nm nodes.
• Hands-on expertise with Voltus/Redhawk-SC.
• Hands-on experience with Innovus/ICC2 environments.
• Strong scripting and automation background.
• Understanding of placement, routing, congestion, timing ECOs, and their impact on PG integrity.

Details

• Location: Hyderabad.