Senior Debug Validation Engineer

Overview

Senior Debug Validation Engineer driving post-silicon debug and validation for next-generation AI compute silicon and systems. Leads efforts to identify, reproduce, analyze, and resolve complex silicon, firmware, and system-level issues during bring-up and product readiness.

What you'll do

• Lead post-silicon debug and validation activities for AI compute silicon and platform technologies.
• Investigate and resolve complex silicon, firmware, software, and system-level issues during bring-up and validation.
• Develop structured debug methodologies and failure analysis processes to improve issue resolution efficiency.
• Collaborate with architecture, RTL, firmware, software, systems, and platform teams on root-cause analysis and corrective actions.
• Drive debug of CPU, memory, interconnect, and high-speed I/O subsystems under functional, stress, and workload conditions.
• Build and enhance automated debug, regression, and validation infrastructure using Python.
• Support validation tests, debug tooling, custom diagnostics, and define validation metrics and reporting.

What you'll need

• Strong experience in bare metal environments.
• Good knowledge of SoC and platform architectures.
• Expertise in debug infrastructure and post-silicon debug methodologies.
• Strong programming skills in Python, C, or debug scripting languages such as CMM.
• Strong Linux and Python experience.
• Deep knowledge of scan, DFT, JTAG, and trace infrastructure.
• Strong debug skills (fault tree analysis, failure isolation, fishbone methodologies, system-level debug).

Details

• Location: Bengaluru, India.