Senior Staff, Emulation Engineer

Overview

Senior Staff, Emulation Engineer on the Connectivity Business Unit's Pre-Silicon Emulation team, owning emulation model development, test execution and system-level debug for connectivity silicon programs.

What you'll do

• Execute emulation model bring-up, test development and debug for connectivity silicon programs, including ODSP, high-speed Ethernet PHYs and AEC/AOC enablement devices, on Palladium, Veloce and Zebu.
• Work with design, validation and firmware teams to understand emulation hardware and software requirements, and implement platform configurations, transactors, speed bridges, protocol adapters and firmware/software stacks.
• Engage with EDA and emulation hardware vendors to resolve platform, tooling and model issues and maintain a productive emulation environment.
• Develop and maintain HW/SW enablement flows and scripts to support RTL validation and improve emulation model usability for firmware, driver and system software development.
• Collaborate with pre-silicon validation, design, firmware and post-silicon teams to identify and resolve emulation bottlenecks and improve validation coverage.
• Build and maintain automation scripts and infrastructure to improve emulation environment productivity, reliability and utilization within assigned programs.

What you'll need

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science or a related field with 7+ years of relevant experience, or a Master's/PhD with 3+ years of experience.
• Hands-on experience with one or more SoC emulation platforms (Palladium, Veloce, Zebu), including building and maintaining emulation models for SoC designs.
• Background in test planning, simulation and debug in Verilog/SystemVerilog environments.
• Experience with SoC development flows, emulation-based debug and system-level validation.
• Scripting and automation skills using Python, Perl, Tcl and/or UNIX shell.
• Ability to collaborate effectively with cross-functional teams including design, validation, firmware and vendor partners.

Nice to have

• Experience with emulation of networking devices or mixed-signal designs, including systems containing PHY or Layer-2/Layer-3 functionality.
• Exposure to connectivity-focused silicon, such as Optical DSPs (ODSP), high-speed Ethernet PHYs and AEC/AOC enablement devices.
• Familiarity with firmware or software bring-up using emulation platforms.
• Experience contributing to or improving emulation infrastructure within a project or product line.

Details

• Eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers.
• Candidates may not use AI tools during interviews; applicants must be eligible to access export-controlled information under U.S. EAR, and may be subject to an export license review unless U.S. citizens, lawful permanent residents or protected individuals.