Sr Engineer Design

Overview

Support the design and verification of custom SoC designs as a senior SoC DFT Engineer, contributing across the silicon lifecycle. The role covers DFT implementation, test development, automation, and silicon-data analysis.

What you'll do

• Implement ATPG, MBIST, LBIST, scan insertion, and analog test architectures.
• Generate and optimize test patterns for coverage, test time, and manufacturing yield.
• Apply standardized DFT methodologies and flows across projects.
• Integrate DFT requirements into RTL and physical design stages.
• Develop TCL, Python, or Perl automation scripts for test analysis.
• Analyze silicon and production test data to support root-cause debugging.
• Document DFT implementations, test results, and reusable IP.

What you'll need

• Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Alternatively, a related bachelor's degree with 2+ years of relevant industry experience.
• Understanding of digital design fundamentals.
• Coursework or project experience using Verilog or SystemVerilog.
• Experience with Python, Tcl/Tk, Perl, or another scripting language.
• Ability to analyze technical problems and communicate findings clearly.
• Ability to work collaboratively and learn new tools and methodologies.

Nice to have

• Experience with Git or another version-control system.
• Experience debugging simulations using logs and waveforms.
• Familiarity with EDA tools in a UNIX design environment.

Details

• Location: Bengaluru, Karnataka, India.