ASIC Verification Engineer

Overview

Plan and implement IP, cluster and SOC functional verification for the GPU and Tegra SoC designs, owning block-level ASIC verification from regression planning through pre-silicon validation.

What you'll do

• Own ASIC verification of IP/cluster for complicated designs in RTL.
• Create regression plans for code and drive functional coverage closure.
• Perform pre-silicon validation activities such as XPROP simulations and GLS.
• Work with HW architects and designers to make the right implementation choices.
• Interact with performance verification teams to augment verification through dynamic simulations and/or formal verification techniques.
• Work from the specifications to ensure functional and code coverage of all RTL you verify.
• Partner with and enable FPGA and software teams to ensure software is tested.
• Be involved in post-silicon verification and debug.

What you'll need

• BS / MS or equivalent experience.
• 1+ years of design experience.
• Experience in ASIC verification of complex design units for at least one or two projects.
• Background with design and verification tools (VCS or equivalent simulation tools, debug tools such as Debussy, GDB).

Nice to have

• Exposure to SystemVerilog and UVM based methodology for ASIC verification.
• Knowledge of memory controllers or prior experience verifying IP/clusters involving access to memory.
• Good debugging and problem solving skills.
• Scripting knowledge (Python/Perl/shell).
• Good interpersonal skills and ability and desire to work as part of a team.

Details

• Location: Bengaluru, India.
• Hybrid work mode.