ASIC Verification Engineer - Clocks

Overview

Own pre-silicon design verification of clocking and reset structures for NVIDIA Tegra automotive and datacenter ASICs, from test plan through productization.

What you'll do

• Own validation of clocking structures in Tegra automotive and datacenter products from start to finish, including test plan development, automation, validation flows development, coverage metrics, test execution, bug identification/fix and productization.
• Tackle sophisticated problems and develop a scalable solution that works across platforms.
• Work hands-on with industry-standard tools and state-of-the-art verification methodologies, coding in SystemVerilog, UVM, C++, Perl, Python and NVIDIA custom compilers and tools.
• Partner closely with the clocks architecture and design team to validate the clocks design.
• Coordinate with internal and external teams across time zones.

What you'll need

• BS or MS in EE/ECE, or equivalent experience.
• 3+ years of relevant industry work experience.
• Good understanding of logic design and architecture.
• Expertise in industry-standard verification flows such as SV constraint random verification, UVM, formal verification, coverage metrics, profiling tools, X-prop, etc.
• Exposure to block-level and system-level verification.
• Strong coding skills in SystemVerilog, scripting languages (Perl/Python) and C++.
• Ability to collaborate and work with multiple groups.
• Prior experience implementing test plans for pre-silicon platforms.

Nice to have

• Understanding of DFT/IST.

Details

• Location: Bengaluru, India.
• Work mode: Hybrid.