CPU Senior Timing Engineer

Overview

Senior CPU timing engineer driving top-level timing analysis and closure for CPU IP, working across design, block timing, physical design, clocking and integration teams to support tapeout.

What you'll do

• Drive top-level timing analysis and closure for CPU IP across implementation and signoff stages.
• Develop, review and maintain timing constraints, MMMC scenarios, path budgets and timing exceptions for top-level integration.
• Analyze and resolve setup, hold, clock gating, noise and cross-block timing issues affecting CPU performance targets.
• Partner with RTL, block owners, physical design and clock teams to close critical paths and improve timing convergence.
• Ensure correlation between block-level, top-level and signoff timing environments, and track timing risks against project milestones.
• Develop scripts and methodology improvements to automate timing analysis, reporting and closure efficiency.

What you'll need

• Bachelor's degree in Electrical Engineering, Electronics Engineering, or related field with 4+ years of hands-on experience OR Master's degree in a relevant field with 3+ years of hands-on experience with strong exposure to CPU or high-performance IP timing closure.
• Strong knowledge of static timing analysis, MMMC flows, timing constraints, OCV/derates, crosstalk and timing exceptions.
• Hands-on experience with STA tools such as PrimeTime or Tempus, and familiarity with implementation tools such as ICC2 or Innovus.
• Proficiency in Tcl and at least one scripting language such as Python, Perl or shell.
• Strong debugging, problem-solving and cross-functional communication skills.

Nice to have

• Knowledge of scripting languages like Tcl, Perl or Python for workflow automation in physical design.
• Proven ability to work effectively in dynamic, cross-geographical and interdisciplinary teams.
• Enthusiasm for designing world-class CPUs that drive innovation and empower future technologies.

Details

• Location: Bangalore, India (Shift 1, India).
• Work model: hybrid, splitting time between on-site at the assigned Intel site and off-site.
• Job type: Experienced Hire.