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DFT Engineer / GPU Logic Design Engineer

Intel
NewPosted today

LOCATION

Bangalore · Hybrid

EXPERIENCE

2+ Years

TYPE

FullTime

SKILLS REQUIRED

Design for TestabilityVerilogDebuggingBoundary ScanATPGMBISTTest Pattern GenerationTiming Closure

Job description

Overview

Join Intel's Data Center Group as a GPU Logic Design Engineer working on graphics IPs (compute, display and media units), covering RTL design, simulation, verification and integration of GPU blocks into SoC designs.

What you'll do

  • Develop logic design, RTL coding, and simulation for graphics IPs, ensuring compliance with power, performance, area, and timing requirements.
  • Participate in defining architecture and microarchitecture features for GPU blocks.
  • Optimize logic design to support physical implementation while maintaining design integrity.
  • Review and implement verification plans to ensure design features are accurately tested across verification hierarchies.
  • Drive unit-level verification and resolve RTL test failures to ensure feature correctness.
  • Support SoC customers in integrating GPU blocks effectively for high-quality results.

What you'll need

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 3+ years of industry experience, OR a Master's degree in the same fields with 2+ years of industry experience, OR a PhD with no prior professional experience.
  • Demonstrated expertise in at least one of the following DFT features: TAP/JTAG, Scan/ATPG, or Array DFT (MBIST/PBIST).
  • Proficiency in EDA tools such as ATPG tools, Mentor Tessent shell, VCS simulation, and debug tools.
  • Experience in silicon enabling debug or test pattern development.

Nice to have

  • Proficiency in design automation and scripting languages for streamlining workflows.
  • Familiarity with structural design flows, including timing, routing, placement, and clock analysis.
  • Knowledge of high-volume manufacturing requirements and test flows.
  • Understanding of 3D, media, and display graphics pipelines.
  • Awareness of SoC architecture principles and best practices.

Details

  • Location: Bangalore, India.
  • Work model: hybrid, splitting time between on-site at the assigned Intel site and off-site.
  • Shift: Shift 1 (India).
  • Job type: Experienced Hire.

Read the full description and apply on the company’s own careers page.

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DFT Engineer / GPU Logic Design Engineer