Display Synthesis Engineer, Senior

Overview

Senior Display Synthesis Engineer to lead display sub-system implementation in a time-critical, complex environment.

What you'll do

• Own synthesis-related responsibilities including synthesis, LEC, and low-power checks.
• Develop signoff-quality constraints and power intent constraints.
• Run and/or analyze RTL Lint, CLP, MEMBIST, and DFT DRC flows.
• Develop TCL scripts and debug/analyze designs.
• Perform hands-on work with Synopsys DCG/Genus/Fusion Compiler and Prime Time.
• Handle ECOs, formal verification, and maintain high-quality matrix.

What you'll need

• Have 3+ years of experience with synthesis and related flows such as LEC and low-power checks.
• Have 5+ years of experience per the role description.
• Be familiar with MCMM synthesis and optimization.
• Write timing constraints for synthesis/STA and work on timing closure and pipelining for performance.
• Understand low-power implementation using UPF.
• Use scripting languages such as Perl/Python and TCL.
• Have a bachelor’s or master’s (or PhD) in engineering fields as specified in qualifications.

Details

• Location: Bangalore, India.