Emulation Engineer

Overview

Emulation Engineer role focused on pre-silicon verification and emulation of ASIC chip designs.

What you'll do

• Conduct detailed studies of chip architecture and micro-architecture to define, develop, and execute comprehensive pre-silicon test plans.
• Verify the design, architecture, and micro-architecture using emulation platforms.
• Develop sub-system and chip-level tests using Tcl, ITcl, Python, and C/C++ to verify chip designs in emulation platforms.
• Build and synthesize Verilog/SystemVerilog-based models for emulation platforms such as Palladium.
• Perform block, sub-system and chip/system-level debugging and root cause analysis for hardware and software issues, addressing pre-silicon challenges.
• Develop and optimize automation scripts and emulation methodologies to improve efficiency, reusability, and coverage.
• Create reusable synthesizable design blocks, libraries, and verification components to streamline emulation processes.
• Build and maintain robust emulation environments that support a global user community.
• Collaborate closely with Architecture, Design, DV, and FW/Validation teams to achieve comprehensive verification coverage and smooth project execution.

What you'll need

• Bachelor's or Master's degree in electrical engineering or related degree with 8+ years in pre-silicon verification/emulation of ASICs.
• Ability to define verification scope and contribute to the development of verification infrastructure.
• Experience collaborating with architects, designers, and software engineers to achieve verification goals.
• Strong expertise in Verilog/SystemVerilog, C/C++, Tcl, Python, and scripting for automation.
• Strong debugging skills and familiarity with DPI transactors, assertions, and coverage-driven verification.
• Excellent communicator who thrives in a collaborative, fast-paced environment.

Nice to have

• Hands-on experience with emulation platforms (Zebu, Palladium), speed bridges, and high-speed interface protocols (e.g., PCIe).
• Verification engineers with simulation backgrounds are also encouraged to apply; strong verification fundamentals are highly valued.