HW Verification Engineering Lead

Overview

Lead the IP Verification and Pre-Silicon Validation team responsible for verifying next-generation purpose-specific custom hardware IP for camera, multimedia and display pipelines in smartphones.

What you'll do

• Oversee the end-to-end IP lifecycle and advanced verification.
• Ensure robust validation methods are used to ensure zero-bug silicon.
• Define and implement best-in-class engineering practices, checklists and design flows to maximise efficiency.
• Head a team responsible for in-house IP development as well as strategic evaluation, integration and validation of other IP blocks.
• Bridge technical execution and people mentorship, ensuring delivery, high quality, and high performance and power-efficient hardware IPs.

What you'll need

• Understanding of digital design principles, algorithm, design and architecture specifications.
• Understanding of SystemC, C and Python programming.
• Design direction in terms of performance, gate count and power for various digital designs.
• Proficient in System Verilog/UVM/OVM.
• FPGA IP/Custom ASIC prototyping and validation.
• Developing scalable test benches in System Verilog and UVM.
• Understanding of cameras / multimedia / display / NPU subsystems in detail.
• Proven track record of integrating complex sub-systems (PCIe, USB, DDR, ARM/RISC-V cores, MIPI etc).
• Design knowledge in Verilog, linting, CDC (clock domain crossing), synthesis, timing analysis, and low power implementation (UPF/CPF, clock gating, power domain).
• Usage of AI tools (e.g., Claude) for IP development enhancement and KPI exploration.
• Leadership traits: people developer, cross-functional bridge, resource optimiser, decisive problem solver, influencer and navigator.

Nice to have

• Graduate / Post Graduate in Electrical / Electronic Engineering / VLSI Design / Microelectronics.

Details

• Location: Phoenix Building, Bangalore, India.