SOC Design Verification Sr Lead Engineer

Overview

As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for high performance, high quality, low power products.

What you'll do

• Understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure, and verify the correctness of the design.
• Implement and analyze SystemVerilog assertions and coverage (code, toggle, functional).
• Work alongside other members of the verification team to analyze, develop and execute verification test cases and provide relevant solutions to issues.
• Collaborate with architects, designers, and pre- and post-silicon verification teams to accomplish your tasks.
• Adhere to quality standards and good test and verification practices.

What you'll need

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience, OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience, OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
• B.E/B.Tech/M.E/M.Tech in electronics with 8+ years of experience in the verification domain.
• Prior work experience at IP level or SoC level.
• Good understanding of processor-based SoC level verification, including native, Verilog, SystemVerilog and UVM mixed environments.
• Hands-on experience with verification tools such as VCS and waveform analyzer, and third-party VIP integration (such as Synopsys VIPs).
• Hands-on experience in UVM.
• C/C++ and SystemVerilog verification languages.
• Good understanding of AXI-AMBA protocol variants.
• Ability to work with scripting languages (shell, Makefile, Perl).
• Strong understanding of design concepts and ASIC flow.
• Good problem solving, analytical and debugging skills are a must.

Nice to have

• Prior work on UFS (Universal Flash Storage), Ethernet and PCIe protocols.

Details

• Location: Bangalore, India.