Peripherals Design Verification Staff Engineer

Overview

Peripherals Design Verification Staff Engineer role focused on unit and IP level verification for hardware systems.

What you'll do

• Perform unit and IP level verification.
• Apply coverage-driven constraint random verification.
• Work with standard protocols including PCIe, CXL, USB, and Ethernet.
• Develop verification testbenches and related components (stimulus, agent, monitor, checker).
• Use SystemVerilog with UVM for verification.
• Plan verification and develop test plans.
• Use C-based reference models inside the testbench and scripting (Perl, Python).

What you'll need

• 4+ years of hardware engineering or related work experience with a Bachelor’s degree.
• 3+ years of hardware engineering or related work experience with a Master’s degree.
• 2+ years of hardware engineering or related work experience with a PhD.
• 9+ years’ experience in unit and IP level verification.
• Experience with coverage driven constraint random verification.
• Strong knowledge of SystemVerilog and UVM.
• Exposure to scripting in Perl and Python.

Details

• Location: Bangalore, India.