Overview
Senior Design Verification Engineer focused on verifying the GPU memory subsystem ASIC design, architecture, and micro-architecture using advanced verification methodologies.
What you'll do
- Verify ASIC design, architecture, and micro-architecture for the GPU memory subsystem unit.
- Define verification scope, develop verification infrastructure, and verify design correctness.
- Create test plans, tests, and verification infrastructure for complex IPs/sub-systems.
- Perform performance and deadlock verification for the GPU memory subsystem unit.
- Build reusable bus functional models, monitors, checkers, and scoreboards using coverage-driven methodology.
- Drive functional coverage verification closure.
- Coordinate with architects, designers, and pre/post silicon verification teams.
What you'll need
- Master’s degree or equivalent experience in Electrical/Computer Engineering or related field.
- 5+ years of ASIC design verification experience on complex IPs/units/sub-systems.
- Deep understanding of verification methodologies and languages: Verilog, SystemVerilog, and UVM.
- Hands-on experience across full verification flow: testplan, tests, coverage model, testbench, and BFM modeling.
- Experience with random stimulus, functional coverage, and assertion-based verification.
- Exposure to industry-standard verification tools for simulation and debug.
Nice to have
- Experience in memory subsystem or network interconnect IP verification.
- Experience using AI techniques (agents, prompt engineering, workflow orchestration) to improve verification workflows.
- Good debugging and analytical skills.
- Strong communication skills and ability to coordinate cross-team work.
- Strong spoken English and cross-team coordination.
Read the full description and apply on the company’s own careers page.
