Sr. Principal Design Engineer

Overview

Sr. Principal Design Engineer role focused on SRAM circuit design for low power, low voltage, and high performance.

What you'll do

• Design and optimize SRAM macros, sense amplifiers, and self-timed circuits.
• Run SPICE simulations to evaluate timing, power, and Static Noise Margin (SNM) across process corners.
• Direct physical design and layout teams for process variability and FinFET manufacturing rules.
• Support post-silicon testing and debug hardware failures.

What you'll need

• B.Tech/M.Tech in Electrical Engineering, VLSI, or Microelectronics.
• Experience typically ranges from 6 to 18 years.
• Deep understanding of CMOS device physics, transistor sizing, and memory cell stability.
• Proficiency with EDA tools such as Cadence Virtuoso or SPICE simulators.
• Ability to use Python or Perl for workflow automation and data analysis.

Details

• Location: HYDERABAD.