Sr Principal Engineer- Switch Architecture

Overview

Sr Principal Engineer for the Teralynx Switch Architecture Team, responsible for defining next-generation data center switch ASIC architecture and leading architecture execution from concept to silicon.

What you'll do

• Define new features, pipelines, and protocols for next-generation data center switch chips.
• Deliver behavioral and performance models to validate architectural decisions and scalability.
• Drive end-to-end switch architecture from high-level concept through micro-architecture and silicon bring-up.
• Partner with cross-functional teams to ensure architectural intent is implemented and verified.
• Analyze tradeoffs across latency, throughput, memory architecture, power, area, and QoS.
• Participate in customer-facing technical discussions aligning capabilities with use cases and requirements.
• Mentor engineers and contribute to long-term architectural direction and roadmap planning.

What you'll need

• 15+ years of relevant experience (or 10–12+ years with a Master’s/PhD) in semiconductor architecture or ASIC development.
• Strong background designing and architecting complex ASICs, ideally in networking or switch domains.
• Expertise in behavioral and performance modeling, architectural validation, and system-level tradeoff analysis.
• Programming skills in C/C++ and Python.
• Ability to collaborate effectively across geographies and multi-disciplinary engineering teams.
• Excellent communication skills to explain complex architectural concepts clearly.

Details

• Location: Bangalore.