Overview
Verification Engineer for PCI Express (PCIE) controllers, responsible for verifying ASIC design and implementation.
What you'll do
- Verify ASIC design, architecture, golden models, and micro-architecture of PCIE controllers at IP/sub-system levels.
- Use verification methodologies such as UVM.
- Build reusable bus functional models, monitors, checkers, and scoreboards using coverage-driven verification.
- Define verification scope and develop test plans, tests, and verification infrastructure.
- Verify correctness of the design by understanding design specification and implementation.
- Collaborate with architects, designers, and pre- and post-silicon verification teams.
What you'll need
- B.Tech./M.Tech. with 2+ years of relevant experience.
- Experience verifying at Unit/Sub-system/SOC level using Verilog and SystemVerilog.
- Background in verification of IP or interconnect protocols such as PCI Express, USB, or SATA.
- Experience developing and working in functional coverage-based constrained random verification environments.
- Experience with DV methodologies like UVM/VMM and exposure to industry-standard verification tools for simulation and debug.
Nice to have
- Knowledge of the PCIE protocol including Gen3 and above.
- Proficiency in SystemVerilog testbench development.
- Scripting/programming experience in Perl, Python, or similar.
- Excellent problem-solving and debugging/analytical skills.
- Interpersonal skills and ability to work as a teammate.
Details
Read the full description and apply on the company’s own careers page.
