Verification Engineer - PCIE

Overview

Verification Engineer role to verify the design and implementation of next-generation PCI Express controllers for NVIDIA GPUs and SOCs.

What you'll do

• Verify the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art methodologies such as UVM.
• Build reusable bus functional models, monitors, checkers and scoreboards following coverage-driven verification methodology.
• Understand the design specification and implementation, define the verification scope, develop test plans, tests and verification infrastructure, and verify design correctness.
• Collaborate with architects, designers, and pre- and post-silicon verification teams.

What you'll need

• B.Tech. or M.Tech.
• 2+ years of relevant experience.
• Experience in verification at Unit/Sub-system/SOC level using Verilog and SystemVerilog.
• Background in verification of IP or interconnect protocols (e.g. PCI Express, USB, SATA).
• Experience developing and working in functional coverage-based constrained random verification environments.
• Experience in DV methodologies such as UVM/VMM and exposure to industry-standard verification tools for simulation and debug.

Nice to have

• Excellent problem solving skills.
• Knowledge of PCIE protocol - Gen3 and above.
• Proficiency in testbench development using SystemVerilog.
• Perl, Python or similar scripting and software programming language experience.
• Good debugging and analytical skills.
• Good interpersonal skills and a strong teamwork orientation.

Details

• Location: Bengaluru, India.
• Work mode: Hybrid (#LI-Hybrid).