ASIC Engineer || Physical Design, CAD Methodology || STA Setup, Convergence Methodology || Exp 4+ years

Overview

Physical Design engineer in Cisco's SiliconOne team in Bangalore, India, driving the backend RTL-to-GDS implementation flow for next-generation networking chips in advanced process nodes.

What you'll do

• Drive the backend process through the entire RTL to GDS implementation flow.
• Perform hierarchical floor planning, place and route, timing closure, power integrity, static timing verification, physical verification and equivalence checks.
• Focus on performance and die size optimization.
• Develop and drive methodologies and best known methods to streamline and automate physical design work.
• Analyze current generation quality and efficiency gaps and identify incremental or evolutionary changes to physical design tools, flow and methodology.
• Provide feedback to the implementation team on different CTS strategies.
• Develop and converge timing ECO implementation strategies.
• Evaluate multiple timing methodologies and tools on different designs and technology nodes.

What you'll need

• Bachelor's or Master's degree in Electrical or Computer Engineering.
• 4+ years of experience.
• Experience with all aspects of ASIC physical implementation, including floor planning, clock and power distribution, global signal planning, I/O planning and hard IP integration.
• Experience with hierarchical design implementation approach, timing closure and physical convergence.
• Experience working on automation scripts within STA tools for methodology development.
• Excellent debugging skills in implementation issues and ability to produce creative solutions.
• Experience with power integrity analysis.
• Experience with STA setup, convergence methodology, reviews and sign-off for multi-mode and multi-corner designs.
• Experience with large designs (>100M gates) using state of the art sub 16/14/7/5/3/2nm technologies.

Nice to have

• Good understanding of different CTS strategies.
• Good at timing ECO implementation strategy development and convergence.
• Experience enabling Tweaker/PrimeTime based ECO flows.

Details

• Location: Bangalore, India.