ASIC Verification Engineer

Overview

ASIC Verification Engineer responsible for IP/Cluster/SOC functional verification for Graphics Processors and Tegra SoCs, including pre- and post-silicon validation.

What you'll do

• Plan and implement IP/Cluster/SoC functional verification for complex designs.
• Own ASIC verification of IP/Cluster in RTL for complicated designs.
• Create regression plans to support functional coverage closure.
• Execute pre-silicon validation using XPROP simulations and GLS.
• Augment verification with dynamic simulations and/or formal verification with performance teams.
• Perform post-silicon verification and debug.

What you'll need

• Have BS/MS (or equivalent) education/experience.
• Have at least 1+ years of design experience.
• Have ASIC verification experience on complex design units for one or two projects.
• Be familiar with design/verification tools such as VCS (or equivalent) and debug tools like Debussy and GDB.
• Have exposure to SystemVerilog and UVM-based methodology for ASIC verification.

Nice to have

• Knowledge of memory controllers or prior verification experience involving memory access.
• Scripting knowledge in Python/Perl/shell.
• Good debugging and problem-solving skills.

Details

• Work mode marked as #LI-Hybrid.