Engineer, DDEG Design Methodology

Overview

Engineer role focused on DRAM design verification methodology and environments, supporting pre-silicon simulation, debug, and regression.

What you'll do

• Assist with verification activities for DRAM design.
• Develop and maintain test cases/stimulus to improve functional coverage.
• Develop and maintain test benches/test vectors and run regressions for coverage analysis.
• Simulate, analyze, and debug pre-silicon block level and full chip designs.
• Improve debug efficiency across simulation and silicon learning loops.
• Leverage AI-based tools, agentic workflows, and automation frameworks to accelerate verification cycle time.
• Co-work with international colleagues on developing new verification flows and methodology.

What you'll need

• Analytical capability for complex gate level circuit designs.
• Basic understanding of CMOS circuit designs.
• Familiarity with SPICE and Verilog simulations.
• Good communication skills.
• Ability to work well in a team.

Details

• Location: Hyderabad, Telangana, India.