Firmware Engineer II

Overview

Firmware Engineer II on the Cadence DDR PHY IP Front End Design team, developing and debugging firmware for DDR5 PHY microcontrollers and supporting hardware, verification and silicon bring-up activities.

What you'll do

• Develop firmware for DDR5 PHY using microcontrollers.
• Develop firmware in C, typically involving bare-metal programming and developing low-level APIs on microcontrollers.
• Collaborate with hardware designers and memory subsystem architects to derive training algorithms and implement them.
• Collaborate with the verification team to deduce the firmware-hardware co-verification plan.
• Develop and debug firmware in RTL-based hardware simulations using C and Verilog simulations.
• Develop and debug on silicon bring-up boards.

What you'll need

• Good knowledge of the DDR5 JEDEC specification.
• Knowledge of different DIMM configurations and specifications.
• Relevant experience developing bare-metal firmware for high-speed SerDes or memory interface physical-layer blocks.
• Good knowledge of the C programming language for embedded software development and use of a relevant IDE.
• Comfort debugging RTL simulations involving firmware and a microcontroller subsystem.
• Good knowledge of Shell, Perl, Python and TCL scripting.
• Good experience with verification EDA tools such as simulators and waveform viewers.

Details

• Location: Bangalore.