Functional Verification Engineer

Overview

Functional Verification Engineer role to develop and execute testbenches that verify the functional correctness of digital designs at block and system level, working as an SME and leading the team.

What you'll do

• Develop and execute testbenches to verify the functional correctness of digital designs at the block and system level.
• Create constrained-random, directed, and coverage-driven tests using languages like SystemVerilog and UVM.
• Collaborate with design and architecture teams to identify corner cases and ensure complete functional coverage before tape-out.
• Act as an SME, collaborate with and manage the team, and be responsible for team decisions.
• Engage with multiple teams, contribute on key decisions, and provide solutions to problems for the immediate team and across teams.
• Lead efforts to improve verification methodologies and processes to enhance efficiency and coverage.
• Mentor junior team members to support their professional growth and skill development.
• Coordinate with cross-functional teams to align verification goals with overall project timelines and deliverables.

What you'll need

• Must have: SoC Verification.
• Minimum 5 years of experience in SoC Verification.
• 15 years full time education.
• Strong knowledge of verification methodologies including constrained-random testing and coverage-driven verification.
• PCIe Subsystem/SoC DV.
• Ethernet/Networking SoC DV.
• Embedded C.
• Firmware validation.
• Xcelium + UVM.
• Driver/Firmware experience.
• Debug HW/SW interactions.
• Debug transactors.
• Connect DUT interfaces to software side.

Details

• Based at the Bengaluru office.