Senior Design Verification Engineer

Overview

Senior IP Design Verification Engineer for the Silicon Chassis team, contributing to the development and verification of IP logic against rigorous specifications.

What you'll do

• Develop and execute detailed verification plans to confirm IP logic adheres to microarchitecture specifications.
• Create and maintain test benches and verification environments using best-in-class methodologies such as OVM and UVM.
• Perform functional and system-level simulations to identify and debug issues, ensuring coverage and compliance with requirements.
• Root cause failing tests and implement corrective measures to resolve design issues.
• Collaborate with cross-functional teams to improve verification strategies and ensure optimal integration of complex architectural and microarchitectural features.
• Analyze power and timing impacts during verification to support overall design optimization.
• Document verification plans, methodologies, and results, and lead technical reviews to refine and enhance verification frameworks.
• Maintain and enhance existing verification infrastructure, contributing to the evolution of methodologies and tool flows.

What you'll need

• Proficiency in hardware simulation, SystemVerilog, and advanced verification methodologies such as OVM and UVM.
• Strong expertise in developing and executing IP test plans and creating detailed verification environments.
• Solid understanding of interconnect/Fabric/NOC and bus protocols such as AMBA AXI/ACE/CHI, PCIe, or CXL, and working knowledge of cache coherency concepts.
• Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related field.
• 8+ years of experience with a Bachelor's degree, or 6+ years with a Master's degree, focusing on IP-level design verification and Subsystem verification.

Nice to have

• Experience with Design for Verification (DFV) techniques and methodologies.
• Demonstrated ability to drive technical reviews and collaborate effectively with architects and design teams.
• Familiarity with emerging trends in verification technologies and a passion for innovation in the field.

Details

• Location: India, Bangalore.
• Experienced hire; Shift 1 (India).
• Hybrid work model, splitting time between on-site at the assigned Intel site and off-site.