Senior Verification Engineer, Memory Subsystem

Overview

Verify the ASIC design, architecture and micro-architecture of NVIDIA's GPU memory subsystem using advanced verification methodologies, with responsibility for performance and deadlock verification.

What you'll do

• Verify the ASIC design, architecture and micro-architecture using advanced verification methodologies.
• Understand the design and implementation, define the verification scope, and develop the verification infrastructure to verify design correctness.
• Create test plans, tests and verification infrastructure for complex IPs and sub-systems.
• Perform performance and deadlock verification of the GPU memory subsystem unit.
• Build reusable bus functional models, monitors, checkers and scoreboards following coverage-driven verification methodology.
• Drive functional coverage-driven verification closure.
• Work with architects, designers, and pre- and post-silicon verification teams.

What you'll need

• B.Tech. or M.Tech. with 4+ years of relevant experience.
• Experience verifying complex IPs, units and sub-systems.
• Verification experience using random stimulus with functional coverage and assertion-based verification methodologies.
• Expertise in Verilog.
• Knowledge of SystemVerilog or similar HVL.
• Familiarity with verification methodologies such as UVM/VMM and exposure to industry-standard verification tools for simulation and debug.

Nice to have

• Experience in memory subsystem or network interconnect IP verification.
• Good debugging and analytical skills.
• Scripting knowledge (Python, Perl or shell).
• Good communication skills and a strong teamwork mindset.

Details

• Location: Bengaluru, India.
• Work mode: Hybrid.