Senior Verification Engineer, PCIE

Overview

Senior Verification Engineer to verify the design and implementation of next-generation PCI Express controllers for NVIDIA GPUs and SOCs.

What you'll do

• Verify the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using methodologies such as UVM.
• Build reusable bus functional models, monitors, checkers and scoreboards following coverage-driven verification methodology.
• Understand the design specification and implementation, define the verification scope, develop test plans, tests and verification infrastructure, and verify design correctness.
• Collaborate with architects, designers, and pre- and post-silicon verification teams.

What you'll need

• B.Tech./M.Tech or equivalent experience
• 4+ years of relevant experience
• Experience in verification at Unit/Sub-system/SOC level and expertise in Verilog and SystemVerilog
• Expertise in comprehensive verification of IP or interconnect protocols (e.g. PCI Express, USB, SATA)
• Experience developing and working in functional coverage based constrained random verification environments
• Background in DV methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug

Nice to have

• Excellent knowledge of PCIE protocol - Gen3 and above
• Good understanding of the system level architecture of PCIE/CXL-based designs
• Perl, Python or similar scripting and SW programming language experience
• Good debugging and analytical skills
• Good interpersonal skills

Details

• Location: Bengaluru, India
• Work mode: Hybrid