Lead engineer Pre-Silicon System Performance

Overview

Senior Staff Engineer in the Server SoC Performance Team, a technical leader responsible for owning end-to-end system performance strategy, methodology, and sign-off for complex server-class SoCs.

What you'll do

• Own system-level performance sign-off across multiple subsystems and use cases.
• Define and drive performance methodology and benchmarks for pre-silicon and early silicon platforms.
• Lead deep-dive investigations involving CPU, memory, NoC, IO, and power-performance trade-offs.
• Translate architecture features into quantitative performance projections and risks.
• Influence architecture and design trade-offs.
• Mentor engineers and act as a technical authority.

What you'll need

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 10+ years of industry experience in SoC/System performance, architecture, or validation.
• Strong expertise in SoC micro-architecture, memory systems, and interconnects.

Nice to have

• Master's degree or PhD (or equivalent experience).
• Extensive experience with RUMI/emulation-based performance sign-off.
• Experience in Server-class / Data Center SoC architecture, including cache-coherent interconnects (e.g., CHI/ACE-class fabrics), scalable memory hierarchies, and high-bandwidth IO subsystems (PCIe/CXL-class), with ability to translate architecture features into performance sign-off metrics and system-level debug.

Details

• Works independently with significant impact on product performance and program success.