Package Design Principal Engineer

Overview

Principal Engineer for high-speed IC package development, driving microelectronic package work from concept through tapeout. You’ll collaborate with package architects and technical leads to select technologies and ensure performance, reliability, and manufacturability.

What you'll do

• Drive microelectronic package development from concept through tapeout.
• Develop C4 and BGA ball maps optimized for SI/PI and layout efficiency.
• Plan and validate netlist mappings across dies, interposers, and substrates.
• Define die placement, padstacks, net assignments, and package-level connectivity.
• Create and maintain Package Requirement Documents (PRDs) covering die arrangements, stackups, and constraints.

What you'll need

• 13-16 years of related professional experience.
• Experience developing netlists and schematics for large, complex packages.
• Experience developing C4 and BGA ball maps for high-pin-count designs.
• Proficiency with Cadence tools such as OrbitIO / Integrity System Planner (ISP) or equivalent.
• Strong understanding of package design areas including design rules, breakout, place and route, shielding, reference planes, and power distribution.
• Grasp of SI/PI fundamentals across substrate, board, and system levels, including simulation (plus).

Details

• Location: Bangalore.