Overview
Power Modelling Engineer, Staff role focused on power estimation, power analysis, and performance verification/correlation for Qualcomm DSP IP in a multi-tier SoC roadmap.
What you'll do
- Drive performance verification/correlation for DSP IP with global teams across architecture, implementation, post-silicon, and back-end.
- Analyze power and performance efficiency across cores and chipsets.
- Build infrastructure to support performance verification and verify processor performance.
- Work with front-end and back-end teams to build power models and estimate power for AI/ML workloads.
- Write targeted tests to measure processor power and performance.
- Triage performance issues in RTL and simulator using micro-architecture knowledge.
What you'll need
- 8-12 years of experience in processor/ASIC power modelling, power estimation, and analysis.
- Experience in micro-architecture testing for modern high-performance, low power processors.
- Experience writing tests and building infrastructure to test power and performance.
- Programming/scripting skills: C, C++, Perl, Python, Shell, and Make file (TCI).
- Strong background in digital design/RTL and improving model performance and processor architecture.
- Strong troubleshooting, analytical, and debug skills.
- Ability to communicate well and work in a fast-paced environment.
Details
- Location: Bangalore, India.
Read the full description and apply on the company’s own careers page.
