R&D Engineer IC Design

Overview

R&D engineering role on Broadcom APD's SoC design-for-test (DFT) work, covering DFT architecture through post-silicon debug and yield improvement.

What you'll do

• Work on various phases of SoC DFT activities for Broadcom APD designs: DFT architecture, test insertion and verification, pattern generation, coverage improvement, post-silicon debug and yield improvement to meet product test metrics.
• Work with the Physical Design and STA team on DFT mode timing closure.
• Interact directly with external customers at times.
• Handle work independently and supervise the work of other team members as required.
• Work with teams across multiple geographies.

What you'll need

• Bachelor's degree with 8+ years of relevant experience, or Master's degree with 6+ years of relevant experience.
• In-depth knowledge of DFT concepts.
• Well experienced in DFT aspects: ATPG, MBIST and JTAG.
• Experience with DFT insertion and verification, pattern generation, coverage improvement, vector simulation and post-silicon debug.
• Strong problem solving and debugging skills.
• Excellent communication skills.

Nice to have

• Expertise in scripting languages such as Perl, shell, etc.
• Experience with Mentor Graphics DFT tools (TestKompress, Fastscan) is highly desirable.

Details

• Location: Bangalore Electronic City, India.