RTL Design - Sr Engineer

Overview

Senior RTL design engineer role in Qualcomm's hardware engineering group, focused on SoC design, timing closure and ASIC development tools.

What you'll do

• Develop constraints and achieve timing closure.
• Work closely with SoC verification and validation teams for pre- and post-silicon debug.
• Use ASIC development tools such as Lint, CDC, Design Compiler and PrimeTime.

What you'll need

• Knowledge of AMBA protocols: AXI, AHB, APB.
• SoC clocking, reset and debug architecture, and peripherals such as USB, PCIE and SDCC.
• Hands-on experience in low power SoC design.
• Experience in synthesis and understanding of timing concepts for ASIC.
• Hands-on experience in multi-clock designs and asynchronous interfaces.
• Experience using ASIC tools such as Lint, CDC, Design Compiler and PrimeTime.
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience, OR Master's degree in a related field and 1+ year of Hardware Engineering or related work experience, OR PhD in a related field.

Nice to have

• Understanding of memory controller designs and microprocessors.

Details

• Location: Chennai, Tamil Nadu, India.