Senior Engineer, CAD

Overview

A senior CAD staff engineer role focused on analog and digital circuit simulation flows, supporting memory design teams and developing new productivity flows that reduce pre-silicon failures.

What you'll do

• Work closely with memory design teams and solve their daily challenges and provide complete solutions for the future.
• Proactively identify problem areas for improvement, propose, and develop innovative solutions.
• Develop highly scalable, and clean software systems.
• Continuously evaluate and implement new tools and technologies to improve the current software flows.
• Work with EDA vendors to evaluate and integrate EDA tools in CAD flows.
• Lead agentic flow implementation using AI-assisted and automated workflows, applying copilot-based assistants, agentic AI flows, and rule-aware automation to circuit simulation and verification.
• Provide technical leadership and guidance to junior engineers, fostering their professional growth and development.

What you'll need

• 5+ years of progressive experience in analog circuit simulation flows.
• Expert in circuit simulation debugging with required knowledge of leading-edge circuit design and simulation methodologies.
• Hands on experience with one of the circuit simulators (Finesim/Primesim/XA/Spectre/VCS/Xcelium etc.).
• Hands-on experience with Cadence custom IC Virtuoso platform, Virtuoso-L, and Virtuoso-XL, schematic capture, or Synopsys custom compiler or equivalent.
• Develop and deploy AI-enabled methodologies for Circuit Simulation Flows.
• Hands on with Python/Perl Object Oriented Programming.
• Good understanding of CMOS concepts and electronic fundamentals.
• Knowledge of Linux, LSF, shell scripting, TCL scripting, SKILL (Cadence) language.
• Excellent problem-solving skills with the ability to troubleshoot complex circuit issues effectively.
• Proficiency in working effectively with global teams and stakeholders.
• Bachelor's/master's degree in Electronics/Electrical/Computer engineering or related fields.

Nice to have

• Knowledge of parasitic extraction tools like StarRC/Quantus will be an added advantage.
• Familiarity with machine learning frameworks such as PyTorch or scikit-learn.
• Experience integrating LLM APIs or related AI capabilities into engineering tools and workflows.
• Experience in EM/IR and STA (Static Timing Analysis) will be an added advantage.
• Experience in AI/ML will be an added advantage.

Details

• Location: Hyderabad - Phoenix Aquila, India.