Overview
Senior Staff Physical Verification CAD Engineer in Bangalore, India, working with design and layout teams to ensure the integrity and performance of Marvell's advanced semiconductor products.
What you'll do
- Develop run sets for nanotechnology and support Calibre and ICV, and provide user support for DRC and LVS debugging to streamline the physical verification flow.
- Automate and support the physical verification flow for the internal design tools group.
- Support tape-out and design-related foundry interface activities, physical verification CAD flow, and CAD flows for SOC integration.
- Develop and maintain validation procedures for the physical verification flow and prepare user guides and documents.
- Use full custom layout tools to review results and create validation test cases.
- Develop and maintain advanced CAD and EDA tools and methodologies for digital and analog IC design, verification, and physical implementation.
- Integrate various EDA tools into an efficient and cohesive design flow, ensuring seamless interoperability and maximizing design productivity.
- Define and optimize design methodologies, flows, and best practices for efficient and reliable chip design, from physical verification to SoC tapeout.
- Automate design tasks, including physical verification flow, design rule decks, and layout migration, to improve design efficiency and reduce time-to-market.
- Evaluate and select third-party EDA tools, libraries, and IPs to meet project requirements, considering performance, scalability, and cost-effectiveness.
- Collaborate with cross-functional teams, including foundry engineers, design engineers, layout designers, and software developers, to provide technical guidance, support, and training on CAD and EDA tools and methodologies.
- Monitor and optimize tool performance, addressing issues or bottlenecks, and ensuring tool reliability, stability, and usability across design projects.
- Stay up to date with the latest advancements in CAD and EDA tools, methodologies, and industry trends, and recommend new technologies to enhance design capabilities.
- Create and maintain comprehensive documentation, user guides, and training materials for CAD and EDA tools and methodologies.
What you'll need
- Bachelor's or Master's degree in Computer Science, Electrical Engineering or a related field.
- 5 to 12 years of related professional experience.
- A minimum of 5 years of experience in CAD and EDA tool development and support, preferably within the semiconductor industry.
- In-depth knowledge and hands-on experience with industry-standard EDA tools and methodologies for digital and analog IC design, verification, and physical implementation.
- Proficiency with tools such as Cadence, Synopsys, Mentor Graphics, and scripting languages such as Tcl, Perl, and Python.
- Synopsys ICV is required.
- Strong understanding of the complete IC design flow, from front-end design (RTL, synthesis, simulation) to back-end physical implementation (place and route, timing analysis, physical verification).
- Demonstrated ability to analyze complex design and tool-related issues, propose innovative solutions, and drive them to completion.
- Excellent interpersonal and communication skills, with a collaborative mindset and the ability to work effectively with cross-functional teams.
- Proven experience leading projects or initiatives, providing technical guidance, and mentoring junior engineers.
- Strong motivation for staying abreast of the latest advancements in CAD and EDA tools and methodologies.
Nice to have
- Mentor Calibre svrf / tvf proficiency.
Details
- Location: Bangalore, India.
- Eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers.
- Position may require access to export-controlled technology under U.S. export control laws; applicants may be subject to an export license review process.
Read the full description and apply on the company’s own careers page.