Senior Engineer, DPG LPDDR Verification

Overview

Senior verification engineer owning full-chip pre-silicon verification and end-to-end analysis of advanced low-power memory designs (DDR5, LPDDR5, DDR6, LPDDR6) operating up to 9600MT/s, working closely with global design and verification teams.

What you'll do

• Guide and set the direction for the verification effort within your areas of expertise in any project the team undertakes.
• Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs.
• Develop test cases and stimulus to increase functional coverage for all DRAM and emerging memory architectures and features.
• Participate in developing verification methodology and verification environments for sophisticated products.
• Co-work with international colleagues on developing new verification flows to take on design challenges.
• Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements.
• Identify verification problems suitable for AI-based automation and collaborate with multi-functional teams to deploy scalable solutions.

What you'll need

• Good communication skills and ability to work well in a team.
• Exposure to gate level simulations (with delays) and logic schematic analysis.
• Analytical capability for complex CMOS and/or gate level circuit designs.
• Proficient with Verilog simulations.
• Bachelor's or Post Graduate degree in Electronics Engineering or related engineering field.

Nice to have

• Experience in System Verilog and PLI coding.
• Experience in UVM test bench.
• Experience in DRAM, SRAM or other memory related fields.
• Experience in timing analysis, including setup/hold and critical data path timing analysis.
• Experience using AI-assisted tools to improve verification productivity, with a strong emphasis on correctness, validation, and responsible use of enterprise-approved AI systems.

Details

• Location: Hyderabad - Phoenix Aquila, India.