Senior Engineer - Hardware Engineering - DV

Overview

Hands-on system Verilog/UVM verification of modern high-performance CPUs, writing and targeting tests for RISC-V CPU verification.

What you'll do

• Write hands-on SystemVerilog/UVM verification code for modern high-performance CPU verification.
• Write test cases and use test generators to generate targeted tests for RISC-V CPU verification.
• Work with internal test generators to target coverage and test-plan scenarios.

What you'll need

• 3 years of experience in DV, preferably in CPU verification.
• Proficiency in System Verilog and UVM methodology.
• Very good object-oriented programming skills.
• Any CPU architecture knowledge (x86, ARM or RISC-V) with test writing/test plan implementation experience.
• Any scripting knowledge, preferably Python.
• Bus interface knowledge such as AXI or PCIe.
• Integration experience with third-party VIPs such as bus VIPs.
• CPU micro-architecture knowledge.

Details

• Location: Ahmedabad, India.
• Requires a successful background and reference checks and satisfactory proof of right to work in India.
• Any offer is contingent on verifying authorization for access to export-controlled technology under applicable export control laws, or the ability to obtain any necessary export license(s) or other approvals.