Overview
Architect and design multi-GPU scale-up/scale-out systems for next-generation AI datacenter platforms, focusing on GPU compute, memory, interconnects, and GPU-to-GPU fabrics.
What you'll do
- Architect multi-GPU systems for scale-up and scale-out configurations.
- Define and evaluate future high-speed interconnect architectures like NVLink and Ethernet co-designed with the GPU memory system and networking hardware.
- Architect RDMA-capable hardware and define transport layer optimizations for large-scale GPU AI workloads.
- Explore and build novel high-density rack-scale AI systems with copper/optical GPU interconnections.
- Use system models, simulations, and bottleneck analyses to guide design trade-offs.
- Collaborate with GPU ASIC, compiler, library, and software teams on hardware-software co-design across compute, memory, and communication layers.
What you'll need
- BS/MS/PhD in Electrical Engineering, Computer Engineering, or an equivalent area.
- 8 years or more of relevant experience in system design and/or ASIC/SoC architecture for GPU, CPU, XPU, or networking products.
- Deep understanding of communication interconnect protocols including Ethernet, InfiniBand, NVLink, CXL, and PCIe.
- Ability to architect multi-GPU/multi-CPU topologies with awareness of bandwidth scaling, NUMA, memory models, coherency, and resilience.
- Strong analytical and system modeling skills for performance, power, and resilience.
- Excellent cross-functional collaboration skills.
Nice to have
- Experience with NICs, DPUs, RDMA/RoCE, or InfiniBand transport offload architectures.
- Expertise in chiplet interconnect architectures or multi-node fabrics and protocols for distributed high-performance computing.
Details
- Location: Bengaluru, India.
- Work mode: Hybrid (#LI-Hybrid).
Read the full description and apply on the company’s own careers page.