Silicon Packaging Design Engineer

Overview

Define and deliver packaging solutions for highly innovative integrated circuits, balancing mechanical, thermal and electrical performance with the lowest package and system-level cost.

What you'll do

• Define packaging solutions for highly innovative integrated circuits, meeting mechanical, thermal and electrical performance requirements with the goal of achieving the lowest package and system-level cost.
• Co-design with chip designer, system engineering and PCB design teams during development to optimize pad layout and pin map for the most cost-effective package and system.
• Independently plan, design and develop quality custom lead frame, substrate or module with supporting electrical simulation to reduce cross-talk, IR drop and noise issues.
• Act as technical lead for implementing packaging solutions at the OSAT assembly site and/or internal assembly site.
• Ensure optimized package design meets the assembly design rules of the selected assembly site.
• Work with the assembly partner to mitigate potential risks and improve situations to meet yield targets within project milestone requirements.
• Work with the NPI manager to prepare assembly site readiness for continuous, uninterrupted flow from wafer fab-out to quality packaged samples meeting the required NPI schedule.
• Maintain a complete set of product-specific packaging-related drawings and reports.

What you'll need

• Bachelor's or Master's degree in Electrical Engineering, Mechanical Engineering or Material Science.
• More than 10 years of experience in the field of IC packaging design and layout.
• Package design experience using Siemens Xpedition EDA tool set (must have).
• Understanding of performance and cost trade-offs for different layout and assembly rules.
• Extensive manufacturing process knowledge of wafer bumping, substrate and lead frame manufacturing, and assembly of wire bond and flip chip packages.
• Good analytical, communication and organization skills.

Nice to have

• Practical knowledge of signal integrity and power integrity in PCB design.

Details

• Location: Bangalore, India.
• Employment type: Intel Contract Employee.
• Shift: Shift 1 (India).
• Work mode: On-site.