2013158 ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits (modulator drivers, TIAs, CDRs, PLLs, ADC/DAC) | 10+ years

Overview

Cisco's Silicon One Optics Group seeks a High Speed AMS Design Engineer to drive full-chip electrical specifications and deliver mixed-signal design for silicon photonics driver integrated circuits supporting 100G/200G/400G per Lambda solutions.

What you'll do

• Participate in analog/mixed-signal design for Cisco's next generation silicon photonics driver integrated circuits for 100G/200G/400G per Lambda solutions.
• Drive full-chip electrical specifications, circuit design, and verification test plans from concept through production, coordinating across electrical, optical, and product teams.
• Author mixed-signal datapath designs including photonics modulator drivers, serializers, PLLs, TIAs and control circuits while optimizing for power, performance, testability, and cost.
• Debug complex silicon and system-level issues during bring-up, and lab validation phases, driving yield enhancements and failure analysis.
• Collaborate with architecture, digital, SI/PI and product teams on verification, design and testability strategies.

What you'll need

• Bachelor's + 7 years of related experience, or Master's + 4 years of related experience, or PhD + 1 years of high-speed AMS design experience.
• Demonstrated knowledge in high-speed optical transceiver design (modulator drivers, TIA, CDR, PLLs, ADC/DAC).
• Proficiency with industry standard tools (Cadence Virtuoso, Spectre, Caliber).
• Strong skills in device physics and circuit operations.
• Proficiency in Python or C for design automation, scripting, and analytical tools.

Nice to have

• Master's or PhD degree in Electrical Engineering.
• 6-8 years of hands-on analog/mixed signal circuit design experience.
• Experience with silicon photonics driver ICs and direct-detect optical module architectures.
• Good understanding of silicon photonics, optical subsystems.
• Expertise in one or more high-speed PHYs, protocols and subsystems (SerDes 112Gbps/224Gbps PAM4, Ethernet, UCIE, clock and data recovery systems, PLLs, ADC/DAC circuits).
• Hands-on experience with lab instrumentation (digital communication analyzers, real-time scopes, BERTs), SI/PI and test fixture/PCB.
• Familiarity with Verilog-A modeling for AMS simulations.
• Strong collaborator and team player with ability to work across teams in multiple sites.

Details

• Location: Bangalore, India.