SR, Engineer - AMS Verification

Overview

Plan and execute analog and mixed-signal verification for circuits at block, subsystem, and full-chip levels. Develop simulation environments, automation, and AI-assisted engineering workflows to improve AMS verification.

What you'll do

• Plan and execute verification of analog and mixed-signal circuits at block, subsystem, and full-chip levels.
• Develop and maintain full-chip mixed-signal simulation environments where analog circuitry, digital logic, and firmware coexist.
• Create schematic and behavioral models for selected blocks to make full-chip simulations feasible, efficient, and sufficiently accurate for the intended verification objective.
• Develop verification plans from design data sheets, new feature requests, requirements, interface definitions, and identified risk areas.
• Run static and dynamic simulations to identify leakage paths, power-sequencing issues, and unintended circuit interactions.
• Perform device-level electrical rule checks, including SOA, snapback, SFB, and related reliability checks.
• Perform SPF extraction analysis and fanout, connectivity, and coupling checks.
• Execute power-cycling simulations, including power-loss and brownout events.
• Run chip-level user-mode simulations that correlate analog subsystems, logic behavior, and firmware algorithms.
• Debug complex AMS failures with a system-level outlook, identify root causes, and work with design, firmware, and verification partners to drive closure.
• Develop scripts and reusable automation for regression setup, simulation execution, log processing, waveform analysis, result comparison, and report generation.
• Develop AI-assisted engineering flows and agent-based tools that automate or accelerate repetitive AMS verification activities.
• Prototype engineering agents for requirement-to-test extraction, verification-plan assistance, regression triage, log summarization, failure clustering, waveform-analysis guidance, coverage-gap identification, and technical report generation.
• Integrate approved engineering data, scripts, simulation results, and documentation into reusable AI workflows with clear validation checks and human review.
• Define success criteria, evaluate the accuracy and usefulness of AI-generated outputs, document limitations, and ensure final verification decisions remain grounded in simulations, specifications, and engineering judgment.
• Collaborate with Product Engineering, Test, Probe, Process Integration, Assembly, and other partner teams to improve product quality, root-cause analysis, reliability, cost, and time-to-market.

What you'll need

• Bachelor’s degree in Electrical Engineering, Electronics Engineering, or a related discipline with 3+ years of relevant experience, or a Master’s degree in Engineering with relevant experience.
• Understanding of MOS device physics, including important second-order effects.
• Working knowledge of analog and mixed-signal circuits such as current mirrors, bandgap references, operational amplifiers, regulators, ADCs, DACs, and charge pumps.
• Hands-on experience with AMS verification, including testbench development, simulation setup, regression execution, waveform analysis, and debug.
• Familiarity with Virtuoso, HSPICE, XA or FastSPICE-class simulators, and co-simulation environments.
• Familiarity with hardware description languages such as Verilog/SystemVerilog and Verilog-A/Verilog-AMS.
• Working knowledge of Linux/UNIX and scripting using Python, Perl, shell, or an equivalent language.
• Exposure to AI development concepts or workflows, such as large language models, prompt-based automation, retrieval-augmented generation, AI-assisted coding, or agent-based systems.
• Ability to use AI-assisted development responsibly, validate generated outputs, and convert a verification pain point into a practical automation prototype.
• Strong debugging mindset, ability to understand complex workflows, and a consistent drive to innovate and improve verification efficiency.
• Good communication, collaboration, and documentation skills.

Nice to have

• Deep knowledge of NAND memory architecture and periphery circuits.
• Experience with analog and digital simulators such as HSPICE, FastSPICE, XA, and Verilog-based simulation flows.
• Experience building or maintaining chip-level analog and mixed-signal co-simulation environments.
• Familiarity with Cadence design environments and LVS/DRC tools.
• Proficiency in Python and experience working with APIs, structured data, version control, and maintainable software-development practices.
• Experience prototyping an AI agent or multi-step AI workflow using requirements, data sheets, simulation logs, waveform-derived data, verification results, or engineering documentation.
• Familiarity with tool-calling, retrieval, evaluation methods, guardrails, and human-in-the-loop review for reliable engineering AI applications.
• Experience measuring the benefit of an automation or AI flow using indicators such as reduced manual effort, faster debug, improved traceability, or better verification completeness.
• Ability to collaborate across AMS design, circuit verification, firmware, CAD, data engineering, and software teams.

Details

• Location: Hyderabad, India.